§ 01One-Paragraph View
TSMC is the structurally cleanest long in the cohort: a wide-and-strengthening leading-edge logic monopoly (~71% pure-foundry, ~85–90% sub-5nm, HHI ~7,500–8,200) compounded by a packaging chokepoint (CoWoS-L) where NVIDIA alone has booked >50% of capacity through 2027 (per competitor.md, market.md). Six of seven analysts gave 4–5 conviction; the consistent "weakest" reads (financial 4, supply-chain 4, regulatory 4, macro 4) all converge on the same root cause — the multiple is full, the chokepoint is real, and the Taiwan tail is uninsurable — which is precisely the framing that justifies a concentrated, not a probe, position. The thesis works because TSMC has flipped supplier concentration from a margin pressure into pricing power (four consecutive years of advanced-node price hikes accepted by customers, Q1 2026 GM 66.2%), and customer concentration from leverage risk into customer-funded capex (Apple per-node prepays, NVIDIA non-refundable CoWoS-L deposits). The single thing that breaks it is non-competitive and non-financial — Taiwan Strait posture — and that risk is real, structurally rising, and the entire reason the multiple isn't yet at 30x forward.
§ 02Direction & Sizing
| Field | Value |
|---|---|
| Direction | long |
| Conviction (1–5) | 5 |
| Sizing tier | large (concentrated) |
| Holding horizon | 18–36 months structural; trim only on Section 232 binary or material Taiwan posture shift |
| Initial entry framing | Scale-in over 4–6 weeks at current levels; reserve 30% of target weight for adverse Section 232 surprise (mid–late 2026 decision window). Pair-trade overlay: TSM long / INTC short to express foundry leadership as a relative-value position; sized smaller than the outright due to INTC tail-risk asymmetry. |
The screener flagged TSM as "long, conviction 5, chokepoint." Seven independent analyst reads support that. The only reason to sit smaller than large is portfolio-level Taiwan concentration — if the cohort already holds significant Taiwan-exposed AI-stack longs (NVDA, ASML, SK Hynix exposure to TSMC HBM base-die capacity), the marginal Taiwan risk dollar is what bounds size, not TSMC-specific conviction. As an isolated name, this is the highest-conviction long in the cohort.
§ 03Bull Case
The chokepoint compounds. TSMC's process leadership has been re-cemented by an advanced-packaging chokepoint (CoWoS-L) that the 2018-era thesis didn't price in (per competitor.md). The packaging moat captures value at both the logic die and the substrate — Intel's Foveros/EMIB and Samsung's X-Cube exist but capture none of the hyperscaler AI cycle. CoWoS scales 35K → 130K WPM by end-2026 with >85% pre-allocated; NVIDIA 60%, Broadcom 15%, AMD 11% (per market.md). This is not a demand call; it is a booking schedule.
Pricing power is being demonstrated, not inferred. Q1 2026 GM 66.2% (vs guide 63–65%); FY25 GM 59.9% with the long-term GM target raised to 56%+ (per financial.md). N2 priced ~50% above N3 (~$30K vs ~$20K/wafer); 5–10% advanced-node hikes notified for four consecutive years 2026–2029 (per market.md, competitor.md). This is what a strengthening moat looks like in the P&L. Trailing-edge foundries (UMC, GFS, PSMC, VIS) are facing China 28nm-driven ASP deflation; TSMC is taking price every year. The pricing pattern is inverted from foundry history.
Customer concentration is leverage, not risk. Apple ~25%, NVIDIA rising to ~22–25%, top 10 ~75–80% — but Apple pre-pays per node, NVIDIA had to lock 800K+ wafers and 510K CoWoS-L slots through 2027 just to secure supply, and the customer-flight pattern over the last decade has been one-directional toward TSMC (Qualcomm 2022, NVIDIA pre-2020, AMD) (per customer.md, competitor.md). The HPC/AI mix has overtaken smartphone (~50–58% vs ~28–30%) — replacing the highest-volatility historical revenue with hyperscaler AI demand that is buy-the-capacity-you-can-get rather than negotiate-on-price. End-market mix has never been better.
Customer-funded capex makes capital intensity manageable. $52–56B of 2026 capex against $73B+ FY25 OCF and a $40B net cash position — entirely self-funded, no equity raise, no debt step-up (per financial.md). Apple pre-payments and NVIDIA reservation deposits sit as customer liabilities funding the capital cycle. ROIC FY25 ~52% against ~9% WACC = ~43-point spread, among the highest in any large-cap industrial. SBC at 0.03% of revenue means reported EPS is real EPS — a quietly enormous quality flag relative to US/Korean semi peers running 4–8% SBC.
Supplier concentration is symmetric across competitors. Every ZEISS / ASML / Japanese-resist event hurts Samsung and Intel identically; TSMC's relative position improves in every cross-vendor stress (per supply-chain.md). The April 2026 M7.7 Japan quake shutting TOK Koriyama (~25% of global advanced resist) for 4–8 weeks is a live in-cohort stress test — the cohort will see in Q2-Q3 2026 prints whether TSMC absorbs (historically yes, then raises prices, then pushes delivery dates).
Regulatory net is modestly positive. TSMC is the largest single beneficiary of allied industrial policy (~$15B+ committed across CHIPS, METI, EU Chips Act); Taiwan's "most-advanced-node-stays-onshore" rule codifies the moat by mandate (Arizona always lags by one generation); no antitrust action despite 90% leading-edge share — the political read is "desired outcome" (per regulatory.md).
FX is a multi-year tailwind. USD-invoiced revenue against a TWD/JPY-skewed cost base in a strong-dollar regime; a 10% trade-weighted USD strengthening lifts reported GM ~350–400 bps (per macro.md). HPC mix decouples revenue from traditional cycles. Capex funded from operations means rate sensitivity is muted on the operating business (multiple compression risk on the equity is real but separate).
§ 04Bear Case
Taiwan tail is the only thing that matters. ~92% of advanced wafer capacity in one strait. Macro analyst probability framing: ~3–10% / 5-year for a blockade-class event, sub-1% / 12-month for kinetic. Equity outcomes: -50–70% in a durable blockade, -90%+ if fabs are destroyed (per macro.md). This is not a risk that operational excellence can solve. Arizona/Japan/Germany ramp ~15–20% of capacity by 2028 — meaningful for a "minimum viable foundry" footprint outside the strait but does not insulate the equity (per supply-chain.md).
Multiple is at top of historical range. EV/EBITDA 18.8x vs 10y median 9.3x; EV/Sales 13.1x vs 5y avg ~8x (per financial.md). Reverse DCF requires ~13–15% revenue CAGR for 10 years to justify current price at 9% WACC and 50% steady-state OM — consistent with the cohort AI thesis but no cushion for a 2027 AI digestion air-pocket, an Arizona cost overrun, or a Taiwan event. Expensive vs trailing-edge foundries (correctly), in line with leading-edge logic chokepoints (ASML), cheaper than broader semi median.
Section 232 is the live downside binary. Commerce report in; presidential decision mid–late 2026 window. Modal outcome (regulatory.md): targeted tariff on advanced-node imports with Arizona-derived exemption — 1–3 ppts of operating margin during the 6–12 month transition, mostly passed through to Apple/NVIDIA/AMD via pricing power. Tail outcome: broad tariff without exemption. Pricing power absorbs most but not all.
Capital intensity is the highest in semi history. Capex/revenue ~43% in FY22 and 2026 guide; FY23 showed how brutal operating leverage runs in reverse (FCF/NI dropped to 34%). If 2027 hyperscaler capex digests after a $600B 2026 print, FCF compresses violently (per financial.md).
Samsung SF2P 70% yield report (Jan 2026). First credible second-source threat in three years. Apr 2026 reporting still pegs Samsung 2nm at ~55% yield — the headline 70% is contested — but Qualcomm and AMD are reportedly running 2nm dual-track evaluation just to keep TSMC honest on pricing (per competitor.md).
Intel 14A binary by 2027. If 14A's DSA produces a real density step that A14 can't match, the structural premise bends. Probability low; impact non-trivial. Intel has installed High-NA tools; TSMC has not committed yet (per competitor.md).
The tier-2 chokepoint stack is genuinely fragile. ZEISS Oberkochen optics (sole-source for every EUV scanner globally), Inpria metal-oxide High-NA resist, TRUMPF/Cymer EUV light source — each is a single-facility single-point-of-failure (per supply-chain.md). The most underpriced single risk in the entire stack is ZEISS, but the impact is symmetric — it hurts every leading-edge fab equally.
§ 05Where the Analysts Disagreed
This section is the centerpiece. The most valuable signal in the file.
Tension 1 — Six analysts converged on conviction 4–5 for opposite reasons. Does that justify a larger position than NVDA, despite worse left-tail risk?
The "weak" 4-conviction reads (financial, supply-chain, regulatory, macro) all reduce to the same sentence: the multiple is full, the chokepoint is real, the Taiwan tail is uninsurable. None of them dispute the chokepoint or the operational quality. They are all pricing the same residual risk through different lenses. Compare to NVDA, where the 4-conviction reads (macro, supply-chain) reflect different underlying concerns — NVDA's macro 4 is about CUDA-moat compression and hyperscaler price-setting, which are independent of NVDA's supply-chain 4 (which is itself TSMC dependence). NVDA has more uncorrelated risk vectors; TSMC has one big risk vector. Resolution: TSMC justifies a larger sizing than NVDA on a per-unit-of-conviction basis because the conviction is more concentrated and less diversified across failure modes — but the size has to respect that a single Taiwan event is binary, while NVDA's risk vectors are more continuously distributed. The pair structure (TSMC long / NVDA long; size NVDA on a wider risk distribution; size TSMC on a tighter/binary one) is the right framing.
Tension 2 — Customer 5 (HPC mix de-risks demand) vs supply-chain 4 (symmetric supplier concentration limits operations) vs financial 4 (reverse DCF only requires 13–15% CAGR). Where's the operational ceiling?
Customer.md says the demand cycle is structurally lengthened by HPC overtaking smartphone. Supply-chain.md says tier-2 chokepoints (ZEISS, Inpria, Tohoku resist) cap the supply curve regardless of demand. Financial.md says the market is pricing 13–15% CAGR — entirely consistent with capacity-constrained 25–30% near-term growth glide-pathing to mid-teens. Resolution: the operational ceiling is set by ASML EUV capacity (~90/yr), CoWoS doubling execution (35K → 130K WPM), and hybrid-bonding tool delivery (BESI/Shibaura) — NOT by demand. The reverse-DCF math works precisely because the supply ceiling, not the demand ceiling, is binding. This is the cleanest possible long setup: a chokepoint asset whose growth is bounded by its own controlled capacity ramp, not by uncertain end-market demand. Customer pre-payment + NVIDIA non-refundable CoWoS deposits + four-year price-hike runway = the supply ceiling is being monetized at maximum ASP.
Tension 3 — Competitor 5 (wide-strengthening moat) vs financial 4 (multiple at top of 10y range, no cushion for digestion). Is this peak-margin trap or new normal?
The classical peak-margin trap is a cyclical company with extension-of-trend optimism. The classical wide-moat compounder is a structural company being correctly priced. Which is TSMC? Resolution: the case for "new normal" rests on three things that did not exist in prior cycles: (a) HPC mix has structurally replaced smartphone as the largest segment (per customer.md) — replacing the most volatile historical line with hyperscaler-funded AI, (b) hyperscaler long-dated capacity reservations have rewired the historical foundry inventory bullwhip (per market.md), (c) advanced packaging is now a separate value-capture layer that didn't exist in the 2018-era margin profile. These are real structural changes, not extension-of-trend. The case for "peak margin" rests on the Arizona/Kumamoto/Dresden cost penalty (15–30% premium) being a slow-burn margin headwind as those fabs scale toward 15–20% of total capacity by 2028. Verdict: ~70% new normal, ~30% peak with a managed glide-down. The pricing power TSMC is exercising (4-year hike runway) explicitly counters the geographic-diversification cost drag — management knows the cost penalty is coming and is pricing for it now. This is a wide-moat-strengthening company correctly priced toward the high end of fair, not a cyclical at peak.
Tension 4 — Macro 4 (existential left tail uninsurable) vs market positioning 5 (highest market-shape conviction in cohort). How do those resolve into a single sizing?
The macro tail is real and rising; the market-shape position is the strongest available. Resolution is a two-part observation: (a) the market-shape view is correct conditional on Taiwan staying gray-zone, and (b) sizing must respect that the conditional probability lives inside a binary that the analyst cannot price. Resolution: the asymmetric framing is upside ~50–80% over 18–36 months × ~93–95% probability vs downside -50–90% × ~5–7% probability. Expected value is positive; risk-adjusted return depends on whether you can absorb the binary. For a cohort that already holds NVDA, ASML, SK Hynix exposure, the marginal Taiwan risk dollar is what bounds the size — not the standalone TSM thesis. Sizing implication: large position as an isolated thesis; medium-large as a portfolio-level decision when correlated Taiwan risks are aggregated.
Tension 5 — Regulatory 4 (Section 232 mid–late 2026) vs financial 4 (multiple full, no cushion). What's the entry sequencing?
Section 232 is the live binary that will move the stock 5–15% on the print. Financial says the multiple already discounts almost no negative surprise. Resolution: Section 232 is asymmetric on entry — modal outcome (targeted tariff with Arizona exemption) is largely priced and pricing power absorbs most; tail outcome (broad tariff) is not priced and would be a 10–15% re-rating event. Entry sequencing: scale-in over 4–6 weeks at current levels; reserve ~30% of target weight for adverse Section 232 surprise. If it lands soft, scale into full size on the next earnings if no surprise. This is one of those rare cases where the dated catalyst is negatively asymmetric on entry — most of the upside is structural and pre-event; the binary downside is the entry tactic.
§ 06Catalyst Calendar
| Date | Event | Direction | Source memo |
|---|---|---|---|
| Q2 2026 (rolling) | Apple N2P trial production March 2026, AMD/NVIDIA N2 ramp | Bull | competitor.md |
| Q2-Q3 2026 (rolling) | Earnings prints showing TOK Koriyama / Apr 2026 quake response — pricing pass-through and delivery cadence | Bull (modal) | supply-chain.md |
| Mid-2026 | TSMC long-term GM target update; Q2 earnings on raised 56%+ floor | Bull | financial.md |
| H2 2026 | Section 232 presidential decision (270-day deadline post-April 2025 initiation) | Binary (modal targeted tariff with Arizona exemption) | regulatory.md |
| H2 2026 | A16 ramp with backside power — first TSMC node | Bull | market.md |
| H2 2026 | Samsung SF2P yield resolution — Qualcomm/AMD 2nm dual-track decision | Bull (if Samsung disappoints) | competitor.md |
| Rolling 2026 | BIS Sophgo/Bingchuan settlement disclosure (~$100–500M one-time charge) | Modest bear (priced) | regulatory.md |
| Q4 2026 / Q1 2027 | EU Commission ESMC Dresden state-aid milestone review | Neutral | regulatory.md |
| 2026–2027 (rolling) | CoWoS-L capacity ramp 35K → 130K WPM; hybrid-bonding tool execution (BESI/Shibaura) | Bull (modal); Bear if slips | supply-chain.md, market.md |
| 2027 | Intel 14A DSA result — binary | Bear if Intel succeeds; Bull if fails | competitor.md |
| 2027 | TSMC High-NA EUV decision at A14 — gates Inpria sole-source exposure | Mixed | supply-chain.md |
| 2027 | Rapidus 2nm risk production attempt — analyst skeptical | Neutral (modal) | competitor.md |
| 2028 | Arizona Fab 2 production-start covenant under CHIPS PMT | Modest bear if missed (penalty) | regulatory.md |
| 2028 | NVIDIA 800V Kyber rack platform — TSMC packaging captures full BOM | Bull | market.md |
| 2028–2030 | Schneider 800V real revenue ramp window — adjacent demand curve confirmation | Bull (peripheral) | market.md, synthesis.md |
| Structural | Taiwan Strait posture — gray-zone steady-state assumed | Existential left tail | macro.md |
§ 07Asymmetry
Upside (if right): ~50–80% over 18–36 months driven by (a) sustained 25–30% revenue growth into 2027 with GM holding at 60%+ as the AI mix expands and pricing hikes flow through, (b) modest multiple expansion if the market starts pricing the chokepoint as ASML-tier monopoly (forward P/E from 20.5x to 24–26x is a ~20% re-rating leg), (c) Taiwan tail probability staying flat or compressing if cross-strait posture remains gray-zone.
Downside (if wrong): ~-30 to -45% over 12–18 months driven by (a) 2027 AI capex digestion compressing revenue growth to high-single-digits with operating leverage running in reverse, (b) Section 232 broad tariff outcome plus multiple compression toward 10y median EV/EBITDA (~9.3x vs current 18.8x — a 50% multiple compression even if earnings hold), (c) Samsung SF2P yield turning durable enough to take a major customer off N2.
Tail downside: ~-50–90% in Taiwan blockade or kinetic scenario — uninsurable in the equity itself.
Ratio (modal): ~65% upside vs ~37% downside = ~1.75:1. Tail-adjusted asymmetry: weighting the binary at ~5% / 18 months (sub-portion of 3–10% / 5-year): EV ≈ (0.93 × 65%) + (0.05 × -70%) + (0.02 × -45%) ≈ +57%. Modal asymmetry is just barely below the 2:1 bar I use for justifying real positions; tail-adjusted EV is healthy positive.
Verdict on asymmetry: the modal 1.75:1 is below the ideal 2:1 because the multiple is full — not because the business is anything less than excellent. The asymmetry is structurally attractive only because the pricing-power and chokepoint compounding more than offsets the multiple-compression risk in the modal world. This is a position you take for the chokepoint, not the multiple. A 25% drawdown to ~$300 ADR (forward P/E ~15x, EV/EBITDA ~14x — financial.md's stated upgrade trigger) shifts asymmetry to ~3:1 and conviction goes from 5 to "back up the truck." Action: size large now, prepare to upsize on any meaningful Taiwan-driven or Section 232-driven drawdown.
§ 08Kill Criteria
The thesis is invalidated if any of:
- Samsung SF2P yields hold at 70%+ for two consecutive quarters AND Qualcomm or AMD announces a >20% volume shift to Samsung 2nm by H2 2026. This breaks the customer-flight-is-one-directional axiom and re-prices the moat from "wide-strengthening" to "wide-eroding" — the worst long setup.
- TSMC FY26 gross margin compresses below 56% in any single quarter outside of an explicit Arizona-dilution-ramp explanation. The whole financial case rests on the long-term GM target raised to 56%+ as the structural floor; sustained breach signals pricing power has hit its ceiling and the four-year hike runway is being rolled back.
- Section 232 lands as a broad tariff without Arizona/anchor-customer exemption AND TSMC's Q3-Q4 2026 prints show <50% pass-through to customers. Modal outcome is priced; a punitive outcome with weak pass-through compresses operating margin 4–6 ppts and breaks the "pricing power absorbs everything" structural premise.
- Cross-strait posture escalates to declared blockade exercise or kinetic-precursor mobilization signal validated by USINDOPACOM-grade public statements. Position is closed regardless of conviction; this is a portfolio-protection trigger, not an analytical one.
- CoWoS-L capacity ramp slips by >25% on the 2026 exit (target ~130K WPM; floor ~98K WPM). The packaging chokepoint is the compounding leg of the moat; meaningful execution slippage signals the doubling can't be repeated and re-prices the AI-capture thesis.
- TSMC's reverse DCF requires >18% 10-year revenue CAGR to justify the price (vs current 13–15%). This would require either a meaningful price run with no earnings revision or a 2027 capex pause that compresses the forward growth path. Either way, the asymmetry breaks.
§ 09Conviction Distribution Across Analysts
| Dimension | Conviction |
|---|---|
| Competitor | 5 |
| Supply chain | 4 |
| Customer | 5 |
| Financial | 4 |
| Market positioning | 5 |
| Regulatory | 4 |
| Macro | 4 |
| PM (you) | 5 |
The PM 5 is not an average and not a cheerleading number for the working side. It reflects: (a) every analyst said long; (b) the 4s converge on the same root cause (full multiple + Taiwan tail), not different concerns — meaning the residual risk is concentrated and identifiable, which is preferable to dispersed mid-conviction reads; (c) the chokepoint compounding (process + packaging) and the customer-funded capex structure are operationally rare and structurally durable; (d) the kill criteria are observable and time-bounded, which makes the position manageable rather than ideological.
§ 10Open Questions for Next Round
- What is TSMC's actual days-of-supply for advanced photoresist and EUV pellicles? Public disclosure does not confirm the assumed 60–120 days. The Q2-Q3 2026 prints post-April 2026 quake will be the data point (per supply-chain.md).
- Contractual structure of TSMC's EUV allocation from ASML through 2030. Currently inferred from pricing and capex, not disclosed. Material to whether the chokepoint is contractually protected or annually renegotiated.
- Apple/NVIDIA/AMD step toward dual-sourcing at leading edge. The single most important leading indicator of whether the customer-flight axiom is breaking. Watch any explicit second-source qualification announcement at N2 or A16.
- Detailed Arizona unit economics at scale. ~30% premium today is documented; weighted-average margin impact at 15–20% of total capacity by 2028 has been flagged but not stress-tested at 400+ bps.
- Section 232 final report contents. Submitted but not public as of memo date; presidential decision pending. The actual Commerce recommendation (tariff design, exemption framework, severity tier) is the binary input.
- Whether the cohort already holds enough Taiwan-correlated long exposure to bound TSM size. Portfolio-level question outside this memo's scope but the operative size constraint at the cohort level. Coordinate with NVDA, ASML, SK Hynix synthesis.
- High-NA EUV adoption decision at A14 (TSMC's open call). Introduces Inpria sole-source risk if committed; preserves flexibility if deferred.
§ 11Cross-References
- Cohort synthesis: ../synthesis.md
- Analyst memos: competitor.md, supply-chain.md, customer.md, financial.md, market.md, regulatory.md, macro.md
- Pair-trade structural sibling (foundry leadership): TSM long / INTC short — see INTC thesis.md for short-side framing
- Structural pair-up (chokepoint-on-chokepoint): TSM long / NVDA long — see NVDA thesis.md for the price-setter-inside-the-bottleneck framing
Works cited
- TSMC Q4 2025 Earnings Call Transcript
- Q4 2025 GM 62.3% above 59-61% guide; FY2025 GM 59.9% +380bps YoY; FY2026 GM guide 63-65%; pricing 'strategic, not opportunistic'
- Counterpoint Global Pure Foundry Market Share Quarterly
- Quarterly share series TSMC/Samsung/SMIC; Intel Foundry 6% in Foundry 2.0 frame
- Samsung 2nm Yields ~55%, Below MP Threshold (TrendForce, Apr 2026)
- Samsung 2nm yield ~55% as of April 2026, below ~60% MP threshold; Qualcomm leaning back to TSMC
- Samsung Lands $17B Tesla AI6 Foundry Deal (TrendForce)
- Tesla AI6 $16.5-17B Samsung Foundry win at Taylor TX; first major external 2nm-class commitment for Samsung in years
- Samsung vs TSMC vs Intel Foundry Market Numbers (PatentPC)
- Q3 2024 baseline TSMC 64.9% / Samsung 9.3%; Samsung dual-role IDM/foundry conflict; customer-flight pattern
- TrendForce 2Q25 Foundry Revenue 14.6% Up, TSMC 70%
- TSMC Q2 2025 share 70.2%, revenue $30.24B
- TSMC 2nm 50K to 140K Wafers in 2026 Supply Shock (StreetStocker)
- N2 capacity ramp 40k -> 100k wafer/mo 2026, 200k by 2027; demand exceeds initial ramp
- TSMC 2nm Up 10-20%, 3-7nm Single-Digit Hikes 2026 (TrendForce)
- N2 wafer ~$30k +10-20% above N3; N3-N7 single-digit hikes 2026
- TSMC CoWoS-L/S Fully Booked, OSAT Partners Step Up (TrendForce)
- CoWoS-L/S sold out; ASE CoWoP / Amkor stepping up as overflow OSAT alternatives
- TSMC Q4 FY 2025 Results and FY 2026 Outlook (Futurum)
- Q4 2025 GM and FY2026 guidance commentary; 56%+ long-term GM target reaffirmed
- TSMC Samsung Intel Who's Leading the Semiconductor Race (PatentPC)
- Qualcomm 8 Gen 1 35% Samsung yield vs 70% TSMC 4nm; subsequent migration to TSMC for all flagship Snapdragons
- China to Increase Leading-Edge Output 5x in Two Years (Tom's Hardware)
- China 7nm/5nm capacity targets - 100k wafer/mo by 2027-28, 500k by 2030; SMIC 7nm yield 60-70%
- Intel CEO Embraces 18A for External Customers (Tom's Hardware)
- Intel 18A external engagement; CFO acknowledged committed external 18A volume 'not significant' as of mid-2025
- Intel Foundry Reportedly Secures 18A for Microsoft Maia 3 (TechPowerUp)
- Microsoft Maia 2/3 anchor commitment to Intel 18A/18A-P
- Intel Going Big Time Into 14A - Lip-Bu Tan (Tom's Hardware)
- Intel 14A PDK distribution; two test-chip evaluators on Q4 2025 call; zero firm 14A external commitments
- NVIDIA Alone Has TSMC Advanced Packaging Booked Years Ahead
- NVIDIA wafer / advanced-packaging book through 2027
- Rapidus Lands $1.7B to Chase 2nm by 2027 (The Register)
- Rapidus $1.7B Feb 2026 tranche; IBM tech transfer; Tenstorrent first announced customer; 2nm risk production target 2027
- Samsung Hits 70% Yield on 2nm GAA SF2P (FinancialContent, Jan 2026)
- Samsung SF2P 70% yield headline (contradicted by April 2026 reporting); first credible 2nm second-source signal
- SMIC On Track to Produce 5nm for Huawei (Tom's Hardware)
- SMIC 5nm pilot 2026 for Huawei Ascend / Alibaba; DUV-only constraint
- TSMC Boosts CoWoS, NVIDIA Dominates Advanced Packaging Through 2027
- CoWoS scaling 35k -> 130k wafer/mo by end-2026; NVIDIA >50% allocation through 2027; 510k CoWoS-L wafers booked for Rubin/Vera/GB100
- TSMC Nears 70% Foundry Share, Gap with Samsung 62.7 pp (BigGo)
- TSMC ~70% pure-play foundry share 2025; gap to Samsung widened to 62.7 pp
- TSMC Q1 2026 Revenue and 66.2% Gross Margin
- Q1 2026 GM 66.2% above 63-65% guide; demonstrates active pricing power
- TSMC to Raise Advanced Node Quotes Up to 10% in 2026 (Tom's Hardware)
- 5-10% sub-5nm hikes 2026; Arizona ~15% premium, N5/N4 25% premium uniformly applied
- TSMC to Raise Prices for Four Consecutive Years From 2026 (WCCFTech)
- Customers notified of 4-year consecutive price hike cycle on advanced nodes
- Why TSMC Grew 4x Faster Than Foundry Rivals in 2025 (Tom's Hardware)
- TSMC growth rate vs rivals; price hikes + vertical integration + technology lead synthesis
- 24/7 Wall St - AI Demand Has Permanently Rewired Semiconductor Pricing
- Hyperscaler long-dated supply commitments dampening foundry inventory cycle
- Astute Group - Advanced Packaging Demand Soars: Nvidia Secures 60% of CoWoS
- Advanced packaging market sizing $49-55B by 2026
- CoWoS allocation
- BIS December 2, 2024 HBM Rule
- HBM density caps for PRC consumption
- bears on TSMC base-die packaging for restricted parties
- BIS Entity List actions and license-suspension notices re: Sophgo (late 2024)
- Underlying enforcement actions tied to Sophgo/Huawei Bingchuan-chip incident
- BIS October 17, 2023 export control rule update
- Expanded thresholds and entity scope
- further constrains TSMC PRC AI book
- BIS October 7, 2022 export control rule (advanced computing and SME to PRC)
- Foundation of FDPR sub-7nm restrictions binding TSMC for PRC fabless customers
- BIS press release — Commerce Strengthens Export Controls (Dec 2024)
- Dec 2024 SME / HBM rule scope
- BIS press release — Foreign-Owned Fab Loophole Closed
- Foreign-owned fab perimeter expansion
- Cohort companies.json (TSM entry id=2)
- Supporting quotes, catalysts (N2 ramp, A16, CoWoS doubling), risks (Taiwan geopolitical concentration, Arizona ~30% cost premium, capex/transistor flatlining)
- cohort companies.json — TSM entry (id 2)
- Customer concentration framing
- CoWoS as binding constraint quote
- catalysts and risks
- Cohort synthesis (chokepoint thesis, hyperscaler $600B capex, CoWoS bottleneck)
- Reverse DCF anchor: AI-cycle structural growth assumptions, CoWoS-L as binding constraint, Arizona 30% cost premium framing
- Cohort synthesis and ledger
- Context on export-control framing and Taiwan tail risk per user notes
- Cohort synthesis.md
- TSM macro positioning, Taiwan tail framing as 'existential', three-bottleneck thesis, AI capex aggregate (~$600B / 50 GW), FX cohort context, cyclicality framing
- cohort synthesis.md — Sections 2, 3.4, 3.7, 5, 7
- Value chain map, three-bottleneck framing, custom-silicon dynamics, hyperscaler $600B capex, end-market context
- Commerce CHIPS Program Office — Preliminary Memorandum of Terms with TSMC Arizona
- $6.6B direct funding
- capacity covenants
- clawback and PRC-expansion guardrails
- Coordination handoff with regulatory-analyst (BIS rule mechanics, CHIPS Act, FDPR)
- Macro lane covers trade-flow direction and FX consequences
- regulatory lane owns specific rule mechanics. Avoid double-counting per contract.
- Counterpoint Research - Global Pure Foundry Market Share Quarterly
- Pure-play foundry quarterly share by player
- Q3'25 prints (TSMC ~71%, Samsung ~6.8%)
- HHI inputs
- Covington & Burling — US Strengthens Export Controls on Advanced Computing and SME (Dec 2024)
- Legal-analysis perspective on Dec 2024 rules
- CRS — U.S. Export Controls and China: Advanced Semiconductors (Aug 2025)
- Export-control regime trajectory and TSMC China-customer revenue exposure
- Deloitte Insights - 2026 Semiconductor Industry Outlook
- $975B-$1T market 2026 sizing
- 26% YoY growth
- Digitimes - TSMC unveils four-year price hike for advanced chips starting 2026
- Four-consecutive-year ASP runway 2026-2029
- ASP discipline thesis
- Entropy Capital — ASML's Supply Chain, Bill of Materials
- ASML BOM and tier-2 dependency map
- Epoch AI — Advanced packaging and HBM, not logic dies, were the bottlenecks on AI chip production in 2025
- CoWoS-as-binding-constraint corroboration
- EU Commission State aid Decision SA.107536 — Germany — ESMC Dresden
- EUR 5.0B state-aid clearance for ESMC JV
- capacity and operations conditions
- Fabricated Knowledge (Doug O'Laughlin) - 2026 AI & Semiconductor Outlook
- Cycle framing - mid-supercycle, GB200 inventory partially resolved, expansion phase
- FinancialContent - High-Stakes Gamble: Intel Foundry Resurgence vs TSMC 2026
- Intel Foundry Q3'25 revenue ($223M, ~0.5%)
- Nvidia 18A pause
- competitive depth
- FinancialContent - The Great Packaging Pivot: TSMC Doubling CoWoS Capacity
- CoWoS allocation 2026 (Nvidia 60%, Broadcom 15%, AMD 11%, >85% pre-allocated)
- FinancialContent - The Silicon Mosaic: Chiplets and the UCIe Standard
- Disruption-watch on UCIe maturation
- 120+ consortium members
- mainstream 2026 adoption
- Fortune Business Insights - Semiconductor Foundry Market Forecast [2034]
- TAM 2026 estimate ($202B) - upper bound on consensus range
- GII Research / KSI - Semiconductor Foundry Market Forecasts 2025-2030
- 5y CAGR triangulation
- 10/7/5nm-and-below tier at 28.3% CAGR
- Global Market Insights - Semiconductor Foundry Market Size Growth Report 2035
- TAM 2026 estimate (~$180B)
- 5.6% 2024-2030 CAGR data point
- GuruFocus — TSM EV/EBITDA Historical (10y range)
- 10-year EV/EBITDA range (5.45 min / 9.26 median / 19.24 max) for historical context
- IDC - Semiconductor Foundry 2.0 Market Entering Growth Phase from Recovery (11% YoY 2025)
- Foundry 2.0 sizing
- recovery-to-expansion cycle phase
- TSMC 37% Foundry 2.0 share
- Industry supply-chain analyst estimates (TrendForce, SemiAnalysis, DIGITIMES) — cohort cross-references
- Top-10 customer composition estimate (Apple, NVIDIA, AMD, Qualcomm, MediaTek, Broadcom, Marvell, Sony, Intel, hyperscaler ASICs)
- estimated concentration percentages — flagged as estimates
- METI JASM Phase 1 (Dec 2021) and Phase 2 (Dec 2023) subsidy decisions
- JPY 476B and JPY 732B subsidy commitments to TSMC Kumamoto fabs
- Mordor Intelligence - Semiconductor Foundry Market Analysis
- TAM 2026 estimate ($184.78B)
- 7.42% CAGR 2025-2030
- Multiples.vc — TSMC Public Comps
- Cross-sectional valuation comparison vs WFE chokepoints (ASML, AMAT, KLAC) and foundry peers (UMC, GFS)
- PatentPC - TSMC, Samsung, Intel: Who's Leading the Semiconductor Race
- Leading-edge share at 3nm/2nm (TSMC 90%+)
- competitive positioning vs Samsung/Intel
- Public defense and strategic analyst commentary on Taiwan Strait scenarios
- Probability framing for blockade vs kinetic scenarios
- mechanism (PLA exclusion zone, fuel-reserve depletion, cable-cuts gray-zone). Probability bands are analyst judgment.
- Public macroeconomic regime references (FRED US 10y, DXY, USD/TWD spot, JPY/USD)
- Current regime: USD strength, US 10y 4-4.75% range, TWD weakness 2024-2026, JPY weakness 2022-2026
- Section 232 semiconductor investigation initiation notice
- Live investigation, statutory 270-day clock, presidential decision window
- Section 48D Advanced Manufacturing Investment Tax Credit — final regulations
- 25% ITC structure for TSMC Arizona qualified property
- SemiWiki - CoWoS Capacity Set to Skyrocket by 2026
- CoWoS capacity scaling 35K -> 130K WPM by EOY26
- 1M wafers demand by 2026
- Semiwiki - TSMC 2025 Update: Riding the AI Wave
- TSMC 2025 revenue (~$122.5B, +36% YoY)
- operational scale data
- SpecGas — Neon Production by Country 2026
- Post-2022 neon diversification (China-led, US/Korea capacity additions)
- StockAnalysis.com — GFS, UMC statistics pages
- GlobalFoundries (EV/EBITDA ~10.7x, fwd P/E ~22x) and UMC (EV/EBITDA ~5.5x, fwd P/E ~15x) for relative valuation
- StockAnalysis.com — TSM income statement / cash flow / balance sheet / statistics
- FY22-FY25 historical income / cash flow / balance sheet series
- current multiples (P/E 30.6x, fwd P/E 20.5x, EV/EBITDA 18.8x, EV/Sales 13.1x, FCF yield 1.9%)
- ROIC 52%, ROE 36%
- Taipower historical industrial rationing episodes (notably 2021 drought)
- Taiwan power and water as quasi-macro operating risk
- energy-import dependency context (~97% imported)
- fuel-reserve duration (~40 days)
- Taiwan Statute for Industrial Innovation Article 10-2 (Taiwan CHIPS Act)
- 25% R&D tax credit plus 5% advanced equipment credit
- effective-tax-rate floor
- TechSoda — Explainer: TSMC's 2024 Annual Report Highlights
- Annual report supplier-list synthesis
- Tom's Hardware - Semiconductor industry enters unprecedented giga cycle
- Giga-cycle structural framing of 2026 industry dynamics
- TrendForce - TSMC 2nm 60K Monthly Output 2026, Prices 50% Above 3nm
- N2 pricing premium (~50% above N3)
- 2nm capacity 60K WPM 2026
- TrendForce - TSMC 2nm Reportedly Up 10-20%; 3-7nm Single-Digit in 2026
- 2026 wafer pricing (N2 +10-20% over N3
- N3-N7 single-digit increases)
- Trendforce — ASML's Magic Uncovered: Tech and Partners Behind Its EUV Edge (Nov 2025)
- ZEISS / Cymer / TRUMPF tier-2 dependency mapping for ASML EUV
- Trendforce — Japan Ramps Up Photoresist Investment for 2nm Chips (Nov 2025)
- Photoresist supplier concentration, TOK Korea plant capex
- Trendforce — Japan Rumored to Curb Photoresist Exports (Dec 2025)
- Photoresist export-control geopolitical context
- Trendforce — Kioxia, TEL and Photoresist Makers in Focus After M7.7 Japan Earthquake (Apr 2026)
- April 2026 photoresist disruption stress-test data point
- Trendforce — TSMC Accelerates Arizona 2nd Fab, Eyes 3Q26 Tool Install (Dec 2025)
- Arizona Fab 2 timeline acceleration
- Trendforce — TSMC Reportedly Plans 12 New Advanced Process and Packaging Fabs in Taiwan (Nov 2025)
- Taiwan capacity concentration vs ex-Taiwan ramp
- Trendforce — TSMC Reportedly Pulls Arizona Third Fab to 2027 (Sep 2025)
- Geographic diversification ramp acceleration
- TSMC 1Q26 Management Report
- Q1 2026 P&L, segment mix (HPC 58%, smartphone 29%, advanced nodes 74% of wafer revenue), capex, cash balance
- TSMC 2024 Annual Report
- Tier-1 supplier disclosures, capex allocation, EUV scanner counts
- TSMC 2024 Responsible Supply Chain Report
- Continuity planning posture, 2,000+ chemical/material qualification, neon recycling
- TSMC 2025 Annual Report (English)
- FY25 segment mix, capital allocation framework, dividend policy, capex history
- TSMC 2025 SEC 20-F
- FY25 annual report regulatory filing for ADR
- cash flow detail
- SBC disclosure
- TSMC 4Q25 Earnings Call Transcript
- Capacity utilization, Arizona ramp commentary, capex guidance
- TSMC 4Q25 Management Report
- FY25 full-year P&L, capex (~NT$1.27T / ~$40B), balance sheet
- TSMC Arizona corporate site
- Arizona Fab 1 N4 HVM, yield parity statements
- TSMC Form 20-F (most recent annual filing)
- Customer concentration disclosure (one unnamed >10% customer), geographic/end-market revenue mix
- TSMC Form 20-F (most recent, FY2024)
- Risk factors, government grants disclosure, material litigation note
- TSMC FY24 Annual Report and 20-F filings (general reference)
- FX sensitivity rule-of-thumb (~40 bps GM per 1% TWD/USD move), revenue mix by geography, capex profile, segment mix HPC/smartphone/auto/IoT, balance sheet net cash position
- TSMC IR — Q1 2026 Quarterly Results page
- Q1 2026 revenue, gross/operating/net margins, capex, Q2 and full-year 2026 guidance
- TSMC Q1 2026 Earnings Call Transcript (Investing.com)
- Q1 2026 OCF (NT$699B), FCF (NT$348B), ROE (40.5%), raised long-term GM target (56%+), 2026 capex high-end of $52-56B range
- TSMC quarterly earnings calls (Q3 2024 through Q1 2026)
- HPC overtaking smartphone commentary, CoWoS capacity-doubling guidance, end-market segment color, demand-quality signaling
- TSMC quarterly earnings transcripts FY24-Q1 FY26 (general reference)
- Wafer pricing direction (2023 6-8% raise, 2024 ~3%, N2/A16 reported ~10-15% premium), China revenue trajectory, Arizona ramp commentary, water/power risk mentions
- User-provided cohort context for customer dimension
- Apple ~25%, HPC overtook smartphone in 2024–25, hyperscaler custom-silicon list, switching-cost description, cycle-position read by end-market
- USITC — Ukraine, Neon, and Semiconductors (executive briefing)
- Pre-2022 neon supply baseline
- Wccftech - TSMC Tight 2nm Supply, Four Consecutive Years of Price Hikes
- Confirms multi-year price-hike runway
- supply tightness at N2
- Wccftech — TSMC 2nm Tight Supply / Four-Consecutive-Year Price Increases
- Pass-through pricing power evidence
- Works in Progress Magazine — The world's most complex machine (ASML/EUV)
- ZEISS / Cymer / TRUMPF technical context