§ 01Executive View
TSMC's input side is structurally fragile in the abstract but operationally resilient in practice. The fragility is real: every leading-edge wafer the company ships requires equipment from a single Dutch firm (ASML), optics from a single German firm (ZEISS SMT, sole-sourcing ASML), photoresist from a Japanese trio whose advanced capacity is concentrated in Fukushima/Tohoku, and ~92% of the company's own production from one ~250-mile-long island that sits inside the most contested strait in the world. The resilience is also real: TSMC is the largest single counterparty for every one of those tier-1 suppliers, holds multi-year capacity allocations from them, qualifies redundant chemistry suppliers years in advance, recycles its own neon, and is now ~5 years into a credible (if slower-than-Taiwan) Arizona/Japan/Germany footprint diversification. For a long thesis, the question is not "can the supply chain break" but "what is priced into a 5–10% annual probability of a disruption that would take 12–24 months to recover from." I think the answer is: not enough, but the residual is paid for by the structural moat — TSMC is the only buyer who can actually absorb the tier-1 supply that exists, and that buyer power compounds.
§ 02Input Map
Tier 1
| Input | Supplier(s) | Concentration | Geography | Substitution | Notes |
|---|---|---|---|---|---|
| EUV / High-NA EUV scanners | ASML | Sole-source globally | Veldhoven, NL (final assembly); subsystems Germany/US | None — Nikon/Canon locked out of EUV; >10 years to replicate | TSMC 2025 capex ~$32–36B includes ~60 EUV scanners; ASML 2025/26 capacity ~90 EUV/yr — TSMC is ASML's largest customer |
| DUV immersion (ArFi) | ASML; Nikon as #2 | Duopoly w/ ASML ~90% share at leading nodes | NL / Japan | DUV substitutable in principle; qualified at TSMC | DUV is the workhorse for layers EUV doesn't touch; less of a chokepoint than EUV |
| Deposition / Etch / CMP | Applied Materials, LAM Research, Tokyo Electron | Multi-source (3 majors) but each has sole-source niches | US (AMAT, LAM); Japan (TEL) | Tool-by-tool qualification 12–24 months; cross-qual rare | TEL has a coater-developer near-monopoly tied to ASML EUV |
| Metrology / Inspection | KLA | Effectively sole-source on critical inspection steps | US (Milpitas / Israel) | "Impossible to replace" per synthesis; AMAT/Hitachi partial overlaps | Cohort flag: KLA is the binding chokepoint China cannot domesticate |
| Hybrid bonding tools (for SoIC / HBM4E base-die) | BESI, AMAT, Shibaura | Concentrated 2–3 vendors | NL (BESI), US, Japan | Co-developed with TSMC; qualification cycle long | Capacity-constrained — feeds into the CoWoS bottleneck |
| 300mm silicon wafers | Shin-Etsu Handotai, SUMCO | Duopoly ~60% globally; GlobalWafers + SK Siltron tail | Japan (Shin-Etsu, SUMCO); Taiwan (GW); Korea (SK) | Multi-source feasible; qualification 6–12 months for new wafer-spec | Wafer cost rising at N2/A16; not a near-term disruption risk |
| EUV photoresist | JSR (incl. Inpria for High-NA), Tokyo Ohka Kogyo (TOK), Shin-Etsu Chemical, Sumitomo, Fujifilm | Japanese trio holds ~80–90% global advanced resist; Inpria sole-source for metal-oxide High-NA resist | Japan (Fukushima/Tohoku & Kanto); TOK building Korea plant (¥20B) for diversification | Inpria has no alternative for High-NA metal-oxide; standard CAR resist multi-sourced | Apr 2026 M7.7 quake suspended TOK Koriyama (~25% of global advanced resist) for 4–8 weeks — live demonstration of the risk |
| Specialty / ultra-pure gases (neon, krypton, xenon, fluorine) | Linde, Air Liquide, Taiyo Nippon Sanso; Chinese producers (Hangyang, Yingde, Suzhou Jinhong) | Was concentrated in Russia/Ukraine pre-2022 (~50% neon); diversified post-war | Now China (largest), US (Air Liquide Baton Rouge online Feb 2026), Korea, Taiwan | TSMC recycles/purifies spent neon onsite; multi-sourced post-2022 | Materially de-risked since 2022 — a successful resolution of a previous chokepoint |
| Wet chemicals / slurries | Cabot Microelectronics, Merck KGaA, Fujifilm, Entegris | Multi-source with vendor-specific qualification | Mixed | Multi-month qualification cycles | Routine input, not a chokepoint |
| EDA tools (for in-house design / DFM) | Cadence, Synopsys | Duopoly | US | Locked-in by IP libraries / PDK | Not a fungible input but not a tail-risk either |
Tier 2 chokepoints
The hidden dependencies — and the reason TSMC is more fragile than the multi-sourced tier 1 implies:
- ZEISS SMT optics for ASML EUV. The mirrors and projection optics inside every EUV scanner come from one Carl Zeiss SMT facility in Oberkochen, Germany. ASML owns 24.9% (€1.5B invested 2016) and has zero alternative. A ZEISS Oberkochen disruption stops every leading-edge fab on Earth within ~6 months as ASML field-spares are exhausted. This is the most underpriced single-point-of-failure in the entire stack.
- Cymer / TRUMPF / Coherent EUV light source. The CO₂-laser-driven tin-droplet plasma source is built by Cymer (ASML subsidiary) using TRUMPF lasers. TRUMPF is privately held in Ditzingen, Germany. Lower probability of disruption than ZEISS but identical structural form: one facility, no alternative.
- Inpria metal-oxide photoresist for High-NA EUV. JSR-acquired in 2023; Corvallis, Oregon facility. Sole-source for the resist High-NA EUV requires. If TSMC commits to High-NA at A14 (the user's stated catalyst), this becomes the gating chemistry.
- Japanese photoresist concentration in Tohoku/Fukushima. TOK Koriyama, Shin-Etsu Shirakawa, JSR Yokkaichi. The April 2026 M7.7 quake confirmed: a single seismic event can take ~25% of global advanced photoresist offline for 4–8 weeks. Noto Peninsula 2024 was the prior warning shot. TOK's announced Korea plant (¥20B) is a 3+ year fix.
- Pellicle membranes for EUV reticles. Mitsui Chemicals (Japan) and ASML (in-house) — narrow supplier set, niche but mandatory.
- CoWoS-L packaging substrate / RDL (TSMC internal). Not strictly a supplier, but the binding AI shipment constraint per the synthesis. TSMC is doubling CoWoS to ~80k wafers/mo by end-2026 — if this slips, every fabless AI customer slips with it.
- Ajinomoto Build-up Film (ABF) substrate. Ajinomoto Fine-Techno (Japan) is sole-source for the dielectric film used in flip-chip BGA substrates. Substrate suppliers (Unimicron, Ibiden, Shinko) all consume it.
- Gallium / germanium / rare earths. China controls ~80%+ of refined gallium; export restrictions imposed Aug 2023, expanded 2024–2025. More relevant to GaN/SiC than to silicon logic, but the precedent matters for any future Chinese counter-sanctions on materials TSMC needs.
§ 03Risk Scoring
| Risk vector | Score (1–5) | Why |
|---|---|---|
| Single-source exposure | 4 | ASML/ZEISS/Inpria/KLA are genuinely sole-source on critical paths; partially offset by TSMC's customer-of-last-resort buyer power |
| Geographic concentration of inputs | 4 | Tier-1: Netherlands + Germany + Japan + US clustering. Tier-2: Tohoku photoresist + Oberkochen optics are facility-level concentrated |
| Geopolitical exposure | 5 | TSMC's own production ~92% Taiwan-located; export-control regime asymmetrically constrains China customer revenue (~10–12% of TSMC); Chinese counter-sanction optionality on gallium/rare earths is real |
| Capacity tightness | 4 | ASML EUV (~90/yr) booked through 2027; CoWoS booked through 2027; 2nm wafers booked through end-2026; Inpria High-NA capacity small. Structural seller's market for TSMC's suppliers, but TSMC has first-call allocation |
| Inventory cushion | 3 | TSMC says it maintains ~5-year continuity plans for 2,000+ chemicals and qualifies multiple suppliers; specific raw-material days-of-supply not publicly disclosed. Strategic stockpiles for critical chemistries assumed but not provable from filings |
| Pass-through power | 2 (= strong, low risk) | TSMC has pricing power consistent with ~58% gross margin; reportedly raising 2nm prices for four consecutive years from 2026; Apple pre-pays per node. The strongest pass-through profile in the cohort outside of ASML itself. |
Synthesis. The score profile is unusual: the pure-supply-chain vectors (single-source + geography + geopolitics) are severe (4–5), while the buffer vectors (inventory + pass-through) are strong (2–3). This is the signature of a company that is structurally fragile but operationally insulated by scale and pricing. The right framing is binary: in any non-tail-risk world, the resilience dominates. In the tail-risk world, almost no level of inventory cushion or pass-through power matters. The investable question is therefore the probability of the binary, not the marginal management of the inputs.
§ 04Pass-Through Power
TSMC has demonstrated the strongest input-cost pass-through in the cohort:
- 2024 5%-ish wafer price increase across N5/N3 absorbed without margin compression; gross margin expanded toward 58–59% range.
- 2026+ 2nm pricing: reported four-consecutive-year wafer-price increases starting 2026 (per Trendforce / Wccftech reporting on industry channels) — a multi-year glide path that bakes input inflation directly into customer contracts.
- Arizona ~30% cost premium is being passed to customers (Apple, Nvidia, AMD have reportedly accepted "Made in USA" surcharges).
- Apple pre-payment model uniquely funds capex per node — input shocks land in TSMC's WIP, not TSMC's cash flow.
- The April 2026 Japan earthquake / TOK shutdown is a live test: the cohort will see in Q2-Q3 2026 prints whether TSMC absorbs the resist disruption, raises prices, or pushes delivery dates — historically all three, in that order.
The structural reason pass-through works: there is no Plan B fab. Every fabless customer either pays TSMC's ask or doesn't ship. This is the inversion of the classical "supplier concentration → margin pressure" framework — when the supplier is itself the chokepoint, supplier concentration becomes pricing power.
§ 05Stress Scenarios
Scenario 1: Taiwan invasion or extended PLA blockade (existential)
Probability (subjective): low-mid, 3–10% over 5 years. Cross-strait risk is real but the U.S./Japan/Korea tripwire and the mutual-assured-destruction nature of TSMC's customer base (hyperscalers, defense, auto) make a kinetic resolution low-probability vs. status quo grey-zone pressure. A blockade short of invasion (customs/inspection harassment, undersea-cable cuts, GPS jamming) is meaningfully more probable.
Mechanism. TSMC's Taiwan fabs (~92% of advanced wafer capacity) become unavailable for shipment. Arizona Fab 1 (N4, in HVM since Q4 2024) is the only U.S.-soil leading-edge node; Fab 2 (N3, 2027 production target); Fab 3 (N2/A16, end-of-decade). Japan JASM (28/22/16/12nm — not leading-edge logic). Germany ESMC (28/22nm — auto/industrial).
Financial impact. In the kinetic case: ~80–90% revenue impairment for 18–36 months. In the blockade case: 30–60% revenue compression for the duration plus a step-change in the cost of the U.S./Japan diversification ramp. Equity is binary in the kinetic case; in the blockade case, TSMC arguably emerges more valuable as the world pays any price to rebuild ex-Taiwan capacity it controls.
Response options. (1) Activate Arizona/JASM/ESMC at maximum throughput — capped at maybe 8–12% of total capacity in 2026 ramping toward 25–30% by 2028. (2) IP/process transfer — already legally encumbered (CHIPS Act conditions, Taiwan tech-transfer law). (3) Operate "fabless TSMC" by licensing — existential ego-cost for the company but technically possible. (4) Insurance / sovereign loss-share — limited.
For the long thesis: This is the dominant tail risk and it is largely uninsurable at the security-level. Position sizing should respect it; analytical effort cannot eliminate it. Disclosure that would change view: a credible PLA mobilization signal, or a sudden acceleration of Arizona Fab 3 to 2027–2028.
Scenario 2: ZEISS Oberkochen optics disruption to ASML supply
Probability: low, 1–3% over 5 years — but probability is not zero. Industrial fire, geopolitical sabotage, or a key-personnel concentration loss are all live vectors at a single-facility scale.
Mechanism. ASML EUV throughput drops to whatever field spares + ZEISS recovery allows. Within 6 months, every leading-edge fab in the world (TSMC, Samsung, Intel) is forced to reschedule. New tool installs go to zero; existing tools degrade as mirrors require service.
Financial impact. TSMC capex deployment slows; node-cadence (A16, A14) slips by 12–24 months; the entire AI compute roadmap (Rubin, Rubin Ultra, Feynman) shifts right with it. Counterintuitively, TSMC's near-term revenue impact is small (existing fabs keep producing on installed tools). The damage is to the future revenue curve and the equity multiple.
Response options. Limited. ASML cannot multi-source ZEISS — physically and in terms of know-how it would take a decade. TSMC's only response is to push every existing tool harder and re-prioritize mature-node refurbishment.
For the long thesis: This is the most underpriced single risk in the entire semiconductor stack. The risk is symmetric — it hurts TSMC, but it hurts every competitor identically, so TSMC's relative position is unchanged. As a long, the cohort effect dominates: TSM equity falls in this scenario but its market-share position improves.
Scenario 3: Japanese photoresist tightening (Apr 2026 quake recurrence)
Probability: mid, 15–30% over 5 years for a some-magnitude disruption — Japan has had M7+ events in 2011, 2024 (Noto), and 2026, and Tohoku/Fukushima/Kanto are the concentration zones for Shin-Etsu, TOK, and JSR. The April 2026 event is fresh evidence of the recurrence frequency.
Mechanism. A repeat of the April 2026 pattern: 4–8 week shutdown of ~25% of global advanced resist capacity. TSMC draws down its 60–90 day strategic resist stockpile, deprioritizes lower-margin nodes (N7/N5 mature), preserves N3/N2 customer commitments.
Financial impact. Revenue ~$1–3B compression over 1–2 quarters; gross margin holds within the 56–59% band given the pass-through mechanism. The cohort impact is asymmetric — fabless customers without TSMC's stockpile and price-pass-through hurt more than TSMC.
Response options. (1) Activate stockpile (1–3 months). (2) Qualify TOK Korea capacity (online ~2028). (3) Push customer prioritization — Apple/Nvidia first, lower-margin later. (4) Long-term: accelerate Shin-Etsu/JSR/TOK capacity diversification commitments.
For the long thesis: Manageable. This is the well-rehearsed risk that the company's playbook handles cleanly. Disclosure that would change view: TSMC's actual photoresist days-of-supply (currently undisclosed — best estimate 60–120 days), or any indication the strategic stockpile sat idle during the April 2026 event because it was insufficient.
Scenario 4 (bonus): BIS expansion of equipment export controls reducing China-customer revenue
Probability: high, 40–60% over 2 years — BIS expanded controls in Dec 2024 (24 SME types, HBM rule) and again in 2025 covering foreign-owned fabs in China. The trajectory continues.
Mechanism. Direct impact on TSMC is modest because U.S. controls target TSMC's customers (Chinese fabless) rather than TSMC itself. The Dec 2024 rule against shipping AI-application chips to China hit TSMC directly. Future rules likely tighten the foundry-side perimeter.
Financial impact. China end-customer revenue is ~10–12% of TSMC. Marginal additional restrictions trim 1–3% of revenue. Asymmetric upside: demand displaced from China-targeted parts shows up in U.S./Korean/Taiwanese customers buying more TSMC capacity. Net negative but small.
Response options. Compliance posture is already mature; routing adjustments via Singapore/Malaysia are the standard playbook.
For the long thesis: Modest headwind, partially offset by demand redirection. Not a thesis-breaker.
§ 06Bull Points
- The supplier concentration that looks like fragility is also a moat: TSMC is the only buyer who can commit at the scale ASML/ZEISS/Inpria need to fund their next-gen R&D. ASML's €276M TSMC R&D commitment, Apple's per-node pre-payment, and TSMC's first-call EUV allocation are the operational expression of this — competitors get TSMC's leftovers.
- Pass-through power is the strongest in the cohort and structurally permanent. As long as there is no second leading-edge foundry (Samsung yield-troubled, Intel binary on 14A, Rapidus aspirational), TSMC absorbs input shocks via customer pricing and returns gross margin to the 55–60% band.
- Tier-1 supply concentration is symmetric across competitors. Any ZEISS/ASML/Japanese-resist event hurts Samsung and Intel identically; TSMC's relative position improves in every cross-vendor stress scenario.
- The previous chokepoint (neon) was successfully resolved in 18 months post-2022. This is hard evidence that the company can move on supply-chain bottlenecks when forced — and the playbook (qualify Chinese/Korean/U.S. alternatives, recycle on-site, build strategic stockpiles) is now muscle memory.
- Geographic diversification is finally accelerating. Arizona Fab 1 in HVM with Taiwan-equivalent yield (Q4 2024); Fab 2 pulled in to 2027; Fab 3 pulled in to 2027 (was post-2030); JASM, ESMC operational. By 2028 ex-Taiwan capacity should be ~15–20% of total — small in absolute terms but a meaningful "minimum viable foundry" footprint outside the strait.
§ 07Bear Points
- No level of operational excellence solves the Taiwan tail. ~92% of advanced capacity sits inside one strait that is in the early phase of a structural geopolitical tightening. Every other risk in this memo is footnote-sized next to this one.
- CoWoS is now TSMC's internal bottleneck — capex-bounded, not supply-bounded. Slips here flow directly to AI customer slips. CoWoS-L doubling to 80k/mo by end-2026 is on a knife's edge of execution.
- High-NA EUV introduces a new sole-source (Inpria metal-oxide resist) right at the moment the existing photoresist concentration is being demonstrated as fragile (April 2026 quake). TSMC's High-NA decision (catalyst for late 2026 / 2027) introduces incremental risk before retiring any.
- Disclosure quality on raw-material days-of-supply is poor. TSMC discloses 5-year continuity plans but not the actual stockpile depths the plans assume. Investors are taking this on trust.
- Pricing power has a ceiling: when it pushes customers to qualify alternatives. Apple is rumored to be evaluating Samsung Foundry for non-leading-edge mobile parts at the margin; Intel 18A external customer wins (DoD, Microsoft) are partly priced off TSMC margin envy. TSMC's pricing model is durable but not infinite.
- Equipment export controls trajectory is worsening, not improving. Each iteration shrinks the addressable China end-customer market. Probability of a control that materially constrains TSMC's ability to ship to any customer with Chinese investor exposure is non-trivial.
§ 08Conviction (1–5)
4 / 5 on the supply-chain dimension specifically.
The score reflects: (a) input-side risk that is severe but symmetric across competitors and at least partially insulated by TSMC's buyer power and pricing pass-through; (b) the dominant residual risk being a sovereign tail (Taiwan) rather than a manageable supplier risk; (c) demonstrated track record of resolving prior chokepoints (neon) and ramping geographic diversification (Arizona acceleration); (d) live evidence (April 2026 photoresist event) of the playbook working — which the cohort will see in Q2-Q3 2026 prints. Not a 5 because I am consciously discounting for the Taiwan binary and for the new High-NA / Inpria sole-source.
§ 09Key Risks to This Read
- Assumption: Taiwan tail risk remains in the 3–10% / 5-year range. A material shift in cross-strait posture (PLA mobilization, U.S. policy shift on strategic ambiguity) would compress conviction toward 2.
- Assumption: TSMC's strategic raw-material stockpile is at least 60–90 days for advanced photoresist and critical specialty gases. Public disclosure does not confirm this; I am extrapolating from the April 2026 event-response posture.
- Assumption: Pass-through power persists as long as Samsung and Intel cannot match TSMC at leading edge. Watch Samsung SF2/SF2Z yield, Intel 14A DSA result (2027). A successful Samsung GAA recovery or Intel 14A would shift this.
- Assumption: Arizona/JASM/ESMC ramp continues at the recently-accelerated pace (Fab 2 to 3Q26 tool install / 2027 production; Fab 3 pulled in). Any reversion to original timelines materially worsens the diversification story.
- Disclosure that would most change the read: (1) TSMC actual days-of-supply for advanced photoresist and EUV pellicles; (2) the contractual structure of TSMC's EUV allocation from ASML through 2030 (currently inferred, not disclosed); (3) any meaningful Apple/Nvidia/AMD step toward dual-sourcing at leading edge with Samsung or Intel.
§ 10Sources
- TSMC Investor Relations — 2024 Annual Report. https://investor.tsmc.com/sites/ir/annual-report/2024/2024%20Annual%20Report_E.pdf
- TSMC ESG — 2024 Responsible Supply Chain Report. https://esg.tsmc.com/file/public/2024-TSMC-Responsible-Supply-Chain-Report-e.pdf
- TSMC IR — 4Q25 Earnings Transcript. https://investor.tsmc.com/english/encrypt/files/encrypt_file/reports/2026-01/51d09df96cd89ac19d65af39032b038dc2896a24/TSMC%204Q25%20Transcript.pdf
- Trendforce — "ASML's Magic Uncovered: Tech and Partners Behind Its EUV Edge" (Nov 2025). https://www.trendforce.com/news/2025/11/10/news-asmls-magic-uncovered-tech-and-partners-behind-its-euv-edge-china-cant-replicate/
- Trendforce — "Japan Ramps Up Photoresist Investment for 2nm Chips" (Nov 2025). https://www.trendforce.com/news/2025/11/06/news-japan-ramps-up-photoresist-investment-for-2nm-chips-tokyo-ohka-kogyo-jsr-lead-the-charge/
- Trendforce — "Kioxia, TEL and Photoresist Makers in Focus After Magnitude 7.7 Japan Earthquake" (Apr 2026). https://www.trendforce.com/news/2026/04/21/news-kioxia-tel-and-photoresist-makers-in-focus-after-magnitude-7-7-japan-earthquake-supply-chain-impact-mixed/
- Trendforce — "TSMC Reportedly Pulls Arizona Third Fab to 2027" (Sep 2025). https://www.trendforce.com/news/2025/09/30/news-tsmc-reportedly-pulls-arizona-third-fab-to-2027-ahead-by-one-year-eyeing-2nm-and-a16/
- Trendforce — "TSMC Accelerates Arizona 2nd Fab, Eyes 3Q26 Tool Install" (Dec 2025). https://www.trendforce.com/news/2025/12/18/news-tsmc-reportedly-accelerates-arizona-2nd-fab-eyes-3q26-tool-install-2027-3nm-production/
- Trendforce — "Japan Rumored to Curb Photoresist Exports as China Targets 40% Self-Sufficiency by 2026" (Dec 2025). https://www.trendforce.com/news/2025/12/03/news-japan-rumored-to-curb-photoresist-exports-as-china-targets-40-self-sufficiency-by-2026/
- Trendforce — "TSMC Reportedly Plans 12 New Advanced Process and Packaging Fabs in Taiwan" (Nov 2025). https://www.trendforce.com/news/2025/11/10/news-tsmc-reportedly-plans-12-new-advanced-process-and-packaging-fabs-in-taiwan-as-2nm-supply-tightens/
- Wccftech — "TSMC 2nm Tight Supply / Four-Consecutive-Year Price Increases" (2025). https://wccftech.com/tsmc-increase-2nm-prices-for-four-consecutive-years-due-to-tight-supply/
- Epoch AI — "Advanced packaging and HBM, not logic dies, were the bottlenecks on AI chip production in 2025." https://epoch.ai/data-insights/ai-chip-supply-chain-constraints
- USITC — "Ukraine, Neon, and Semiconductors" (executive briefing). https://www.usitc.gov/publications/332/executive_briefings/ebot_decarlo_goodman_ukraine_neon_and_semiconductors.pdf
- SpecGas — "Neon Production by Country 2026." https://specgasinc.com/feeds/blog/neon-gas-supply-country
- CRS — "U.S. Export Controls and China: Advanced Semiconductors" (Aug 2025). https://www.congress.gov/crs_external_products/R/PDF/R48642/R48642.1.pdf
- BIS — "Commerce Strengthens Export Controls to Restrict China's Capability to Produce Advanced Semiconductors." https://www.bis.gov/press-release/commerce-strengthens-export-controls-restrict-chinas-capability-produce-advanced-semiconductors-military
- BIS — "Department of Commerce Closes Export Controls Loophole, Foreign-Owned Semiconductor Fabs in China." https://www.bis.gov/press-release/department-commerce-closes-export-controls-loophole-foreign-owned-semiconductor-fabs-china
- Covington & Burling — "US Department of Commerce Strengthens Export Controls on Advanced Computing and Semiconductor Manufacturing Items" (Dec 2024). https://www.cov.com/en/news-and-insights/insights/2024/12/us-department-of-commerce-strengthens-export-controls-on-advanced-computing-and-semiconductor-manufacturing-items
- Entropy Capital — "ASML's Supply Chain, Bill of Materials, and the Devastating Effects of Potential Tariffs on US Fabs." https://entropycapital.substack.com/p/asmls-supply-chain-bill-of-materials
- Works in Progress — "The world's most complex machine" (ASML/EUV deep-dive). https://worksinprogress.co/issue/the-worlds-most-complex-machine/
- TSMC Arizona corporate site. https://www.tsmc.com/static/abouttsmcaz/index.htm
- TechSoda — "Explainer: TSMC's 2024 Annual Report Highlights." https://techsoda.substack.com/p/explainer-tsmcs-2024-annual-report
Works cited
- TSMC Q4 2025 Earnings Call Transcript
- Q4 2025 GM 62.3% above 59-61% guide; FY2025 GM 59.9% +380bps YoY; FY2026 GM guide 63-65%; pricing 'strategic, not opportunistic'
- Counterpoint Global Pure Foundry Market Share Quarterly
- Quarterly share series TSMC/Samsung/SMIC; Intel Foundry 6% in Foundry 2.0 frame
- Samsung 2nm Yields ~55%, Below MP Threshold (TrendForce, Apr 2026)
- Samsung 2nm yield ~55% as of April 2026, below ~60% MP threshold; Qualcomm leaning back to TSMC
- Samsung Lands $17B Tesla AI6 Foundry Deal (TrendForce)
- Tesla AI6 $16.5-17B Samsung Foundry win at Taylor TX; first major external 2nm-class commitment for Samsung in years
- Samsung vs TSMC vs Intel Foundry Market Numbers (PatentPC)
- Q3 2024 baseline TSMC 64.9% / Samsung 9.3%; Samsung dual-role IDM/foundry conflict; customer-flight pattern
- TrendForce 2Q25 Foundry Revenue 14.6% Up, TSMC 70%
- TSMC Q2 2025 share 70.2%, revenue $30.24B
- TSMC 2nm 50K to 140K Wafers in 2026 Supply Shock (StreetStocker)
- N2 capacity ramp 40k -> 100k wafer/mo 2026, 200k by 2027; demand exceeds initial ramp
- TSMC 2nm Up 10-20%, 3-7nm Single-Digit Hikes 2026 (TrendForce)
- N2 wafer ~$30k +10-20% above N3; N3-N7 single-digit hikes 2026
- TSMC CoWoS-L/S Fully Booked, OSAT Partners Step Up (TrendForce)
- CoWoS-L/S sold out; ASE CoWoP / Amkor stepping up as overflow OSAT alternatives
- TSMC Q4 FY 2025 Results and FY 2026 Outlook (Futurum)
- Q4 2025 GM and FY2026 guidance commentary; 56%+ long-term GM target reaffirmed
- TSMC Samsung Intel Who's Leading the Semiconductor Race (PatentPC)
- Qualcomm 8 Gen 1 35% Samsung yield vs 70% TSMC 4nm; subsequent migration to TSMC for all flagship Snapdragons
- China to Increase Leading-Edge Output 5x in Two Years (Tom's Hardware)
- China 7nm/5nm capacity targets - 100k wafer/mo by 2027-28, 500k by 2030; SMIC 7nm yield 60-70%
- Intel CEO Embraces 18A for External Customers (Tom's Hardware)
- Intel 18A external engagement; CFO acknowledged committed external 18A volume 'not significant' as of mid-2025
- Intel Foundry Reportedly Secures 18A for Microsoft Maia 3 (TechPowerUp)
- Microsoft Maia 2/3 anchor commitment to Intel 18A/18A-P
- Intel Going Big Time Into 14A - Lip-Bu Tan (Tom's Hardware)
- Intel 14A PDK distribution; two test-chip evaluators on Q4 2025 call; zero firm 14A external commitments
- NVIDIA Alone Has TSMC Advanced Packaging Booked Years Ahead
- NVIDIA wafer / advanced-packaging book through 2027
- Rapidus Lands $1.7B to Chase 2nm by 2027 (The Register)
- Rapidus $1.7B Feb 2026 tranche; IBM tech transfer; Tenstorrent first announced customer; 2nm risk production target 2027
- Samsung Hits 70% Yield on 2nm GAA SF2P (FinancialContent, Jan 2026)
- Samsung SF2P 70% yield headline (contradicted by April 2026 reporting); first credible 2nm second-source signal
- SMIC On Track to Produce 5nm for Huawei (Tom's Hardware)
- SMIC 5nm pilot 2026 for Huawei Ascend / Alibaba; DUV-only constraint
- TSMC Boosts CoWoS, NVIDIA Dominates Advanced Packaging Through 2027
- CoWoS scaling 35k -> 130k wafer/mo by end-2026; NVIDIA >50% allocation through 2027; 510k CoWoS-L wafers booked for Rubin/Vera/GB100
- TSMC Nears 70% Foundry Share, Gap with Samsung 62.7 pp (BigGo)
- TSMC ~70% pure-play foundry share 2025; gap to Samsung widened to 62.7 pp
- TSMC Q1 2026 Revenue and 66.2% Gross Margin
- Q1 2026 GM 66.2% above 63-65% guide; demonstrates active pricing power
- TSMC to Raise Advanced Node Quotes Up to 10% in 2026 (Tom's Hardware)
- 5-10% sub-5nm hikes 2026; Arizona ~15% premium, N5/N4 25% premium uniformly applied
- TSMC to Raise Prices for Four Consecutive Years From 2026 (WCCFTech)
- Customers notified of 4-year consecutive price hike cycle on advanced nodes
- Why TSMC Grew 4x Faster Than Foundry Rivals in 2025 (Tom's Hardware)
- TSMC growth rate vs rivals; price hikes + vertical integration + technology lead synthesis
- 24/7 Wall St - AI Demand Has Permanently Rewired Semiconductor Pricing
- Hyperscaler long-dated supply commitments dampening foundry inventory cycle
- Astute Group - Advanced Packaging Demand Soars: Nvidia Secures 60% of CoWoS
- Advanced packaging market sizing $49-55B by 2026
- CoWoS allocation
- BIS December 2, 2024 HBM Rule
- HBM density caps for PRC consumption
- bears on TSMC base-die packaging for restricted parties
- BIS Entity List actions and license-suspension notices re: Sophgo (late 2024)
- Underlying enforcement actions tied to Sophgo/Huawei Bingchuan-chip incident
- BIS October 17, 2023 export control rule update
- Expanded thresholds and entity scope
- further constrains TSMC PRC AI book
- BIS October 7, 2022 export control rule (advanced computing and SME to PRC)
- Foundation of FDPR sub-7nm restrictions binding TSMC for PRC fabless customers
- BIS press release — Commerce Strengthens Export Controls (Dec 2024)
- Dec 2024 SME / HBM rule scope
- BIS press release — Foreign-Owned Fab Loophole Closed
- Foreign-owned fab perimeter expansion
- Cohort companies.json (TSM entry id=2)
- Supporting quotes, catalysts (N2 ramp, A16, CoWoS doubling), risks (Taiwan geopolitical concentration, Arizona ~30% cost premium, capex/transistor flatlining)
- cohort companies.json — TSM entry (id 2)
- Customer concentration framing
- CoWoS as binding constraint quote
- catalysts and risks
- Cohort synthesis (chokepoint thesis, hyperscaler $600B capex, CoWoS bottleneck)
- Reverse DCF anchor: AI-cycle structural growth assumptions, CoWoS-L as binding constraint, Arizona 30% cost premium framing
- Cohort synthesis and ledger
- Context on export-control framing and Taiwan tail risk per user notes
- Cohort synthesis.md
- TSM macro positioning, Taiwan tail framing as 'existential', three-bottleneck thesis, AI capex aggregate (~$600B / 50 GW), FX cohort context, cyclicality framing
- cohort synthesis.md — Sections 2, 3.4, 3.7, 5, 7
- Value chain map, three-bottleneck framing, custom-silicon dynamics, hyperscaler $600B capex, end-market context
- Commerce CHIPS Program Office — Preliminary Memorandum of Terms with TSMC Arizona
- $6.6B direct funding
- capacity covenants
- clawback and PRC-expansion guardrails
- Coordination handoff with regulatory-analyst (BIS rule mechanics, CHIPS Act, FDPR)
- Macro lane covers trade-flow direction and FX consequences
- regulatory lane owns specific rule mechanics. Avoid double-counting per contract.
- Counterpoint Research - Global Pure Foundry Market Share Quarterly
- Pure-play foundry quarterly share by player
- Q3'25 prints (TSMC ~71%, Samsung ~6.8%)
- HHI inputs
- Covington & Burling — US Strengthens Export Controls on Advanced Computing and SME (Dec 2024)
- Legal-analysis perspective on Dec 2024 rules
- CRS — U.S. Export Controls and China: Advanced Semiconductors (Aug 2025)
- Export-control regime trajectory and TSMC China-customer revenue exposure
- Deloitte Insights - 2026 Semiconductor Industry Outlook
- $975B-$1T market 2026 sizing
- 26% YoY growth
- Digitimes - TSMC unveils four-year price hike for advanced chips starting 2026
- Four-consecutive-year ASP runway 2026-2029
- ASP discipline thesis
- Entropy Capital — ASML's Supply Chain, Bill of Materials
- ASML BOM and tier-2 dependency map
- Epoch AI — Advanced packaging and HBM, not logic dies, were the bottlenecks on AI chip production in 2025
- CoWoS-as-binding-constraint corroboration
- EU Commission State aid Decision SA.107536 — Germany — ESMC Dresden
- EUR 5.0B state-aid clearance for ESMC JV
- capacity and operations conditions
- Fabricated Knowledge (Doug O'Laughlin) - 2026 AI & Semiconductor Outlook
- Cycle framing - mid-supercycle, GB200 inventory partially resolved, expansion phase
- FinancialContent - High-Stakes Gamble: Intel Foundry Resurgence vs TSMC 2026
- Intel Foundry Q3'25 revenue ($223M, ~0.5%)
- Nvidia 18A pause
- competitive depth
- FinancialContent - The Great Packaging Pivot: TSMC Doubling CoWoS Capacity
- CoWoS allocation 2026 (Nvidia 60%, Broadcom 15%, AMD 11%, >85% pre-allocated)
- FinancialContent - The Silicon Mosaic: Chiplets and the UCIe Standard
- Disruption-watch on UCIe maturation
- 120+ consortium members
- mainstream 2026 adoption
- Fortune Business Insights - Semiconductor Foundry Market Forecast [2034]
- TAM 2026 estimate ($202B) - upper bound on consensus range
- GII Research / KSI - Semiconductor Foundry Market Forecasts 2025-2030
- 5y CAGR triangulation
- 10/7/5nm-and-below tier at 28.3% CAGR
- Global Market Insights - Semiconductor Foundry Market Size Growth Report 2035
- TAM 2026 estimate (~$180B)
- 5.6% 2024-2030 CAGR data point
- GuruFocus — TSM EV/EBITDA Historical (10y range)
- 10-year EV/EBITDA range (5.45 min / 9.26 median / 19.24 max) for historical context
- IDC - Semiconductor Foundry 2.0 Market Entering Growth Phase from Recovery (11% YoY 2025)
- Foundry 2.0 sizing
- recovery-to-expansion cycle phase
- TSMC 37% Foundry 2.0 share
- Industry supply-chain analyst estimates (TrendForce, SemiAnalysis, DIGITIMES) — cohort cross-references
- Top-10 customer composition estimate (Apple, NVIDIA, AMD, Qualcomm, MediaTek, Broadcom, Marvell, Sony, Intel, hyperscaler ASICs)
- estimated concentration percentages — flagged as estimates
- METI JASM Phase 1 (Dec 2021) and Phase 2 (Dec 2023) subsidy decisions
- JPY 476B and JPY 732B subsidy commitments to TSMC Kumamoto fabs
- Mordor Intelligence - Semiconductor Foundry Market Analysis
- TAM 2026 estimate ($184.78B)
- 7.42% CAGR 2025-2030
- Multiples.vc — TSMC Public Comps
- Cross-sectional valuation comparison vs WFE chokepoints (ASML, AMAT, KLAC) and foundry peers (UMC, GFS)
- PatentPC - TSMC, Samsung, Intel: Who's Leading the Semiconductor Race
- Leading-edge share at 3nm/2nm (TSMC 90%+)
- competitive positioning vs Samsung/Intel
- Public defense and strategic analyst commentary on Taiwan Strait scenarios
- Probability framing for blockade vs kinetic scenarios
- mechanism (PLA exclusion zone, fuel-reserve depletion, cable-cuts gray-zone). Probability bands are analyst judgment.
- Public macroeconomic regime references (FRED US 10y, DXY, USD/TWD spot, JPY/USD)
- Current regime: USD strength, US 10y 4-4.75% range, TWD weakness 2024-2026, JPY weakness 2022-2026
- Section 232 semiconductor investigation initiation notice
- Live investigation, statutory 270-day clock, presidential decision window
- Section 48D Advanced Manufacturing Investment Tax Credit — final regulations
- 25% ITC structure for TSMC Arizona qualified property
- SemiWiki - CoWoS Capacity Set to Skyrocket by 2026
- CoWoS capacity scaling 35K -> 130K WPM by EOY26
- 1M wafers demand by 2026
- Semiwiki - TSMC 2025 Update: Riding the AI Wave
- TSMC 2025 revenue (~$122.5B, +36% YoY)
- operational scale data
- SpecGas — Neon Production by Country 2026
- Post-2022 neon diversification (China-led, US/Korea capacity additions)
- StockAnalysis.com — GFS, UMC statistics pages
- GlobalFoundries (EV/EBITDA ~10.7x, fwd P/E ~22x) and UMC (EV/EBITDA ~5.5x, fwd P/E ~15x) for relative valuation
- StockAnalysis.com — TSM income statement / cash flow / balance sheet / statistics
- FY22-FY25 historical income / cash flow / balance sheet series
- current multiples (P/E 30.6x, fwd P/E 20.5x, EV/EBITDA 18.8x, EV/Sales 13.1x, FCF yield 1.9%)
- ROIC 52%, ROE 36%
- Taipower historical industrial rationing episodes (notably 2021 drought)
- Taiwan power and water as quasi-macro operating risk
- energy-import dependency context (~97% imported)
- fuel-reserve duration (~40 days)
- Taiwan Statute for Industrial Innovation Article 10-2 (Taiwan CHIPS Act)
- 25% R&D tax credit plus 5% advanced equipment credit
- effective-tax-rate floor
- TechSoda — Explainer: TSMC's 2024 Annual Report Highlights
- Annual report supplier-list synthesis
- Tom's Hardware - Semiconductor industry enters unprecedented giga cycle
- Giga-cycle structural framing of 2026 industry dynamics
- TrendForce - TSMC 2nm 60K Monthly Output 2026, Prices 50% Above 3nm
- N2 pricing premium (~50% above N3)
- 2nm capacity 60K WPM 2026
- TrendForce - TSMC 2nm Reportedly Up 10-20%; 3-7nm Single-Digit in 2026
- 2026 wafer pricing (N2 +10-20% over N3
- N3-N7 single-digit increases)
- Trendforce — ASML's Magic Uncovered: Tech and Partners Behind Its EUV Edge (Nov 2025)
- ZEISS / Cymer / TRUMPF tier-2 dependency mapping for ASML EUV
- Trendforce — Japan Ramps Up Photoresist Investment for 2nm Chips (Nov 2025)
- Photoresist supplier concentration, TOK Korea plant capex
- Trendforce — Japan Rumored to Curb Photoresist Exports (Dec 2025)
- Photoresist export-control geopolitical context
- Trendforce — Kioxia, TEL and Photoresist Makers in Focus After M7.7 Japan Earthquake (Apr 2026)
- April 2026 photoresist disruption stress-test data point
- Trendforce — TSMC Accelerates Arizona 2nd Fab, Eyes 3Q26 Tool Install (Dec 2025)
- Arizona Fab 2 timeline acceleration
- Trendforce — TSMC Reportedly Plans 12 New Advanced Process and Packaging Fabs in Taiwan (Nov 2025)
- Taiwan capacity concentration vs ex-Taiwan ramp
- Trendforce — TSMC Reportedly Pulls Arizona Third Fab to 2027 (Sep 2025)
- Geographic diversification ramp acceleration
- TSMC 1Q26 Management Report
- Q1 2026 P&L, segment mix (HPC 58%, smartphone 29%, advanced nodes 74% of wafer revenue), capex, cash balance
- TSMC 2024 Annual Report
- Tier-1 supplier disclosures, capex allocation, EUV scanner counts
- TSMC 2024 Responsible Supply Chain Report
- Continuity planning posture, 2,000+ chemical/material qualification, neon recycling
- TSMC 2025 Annual Report (English)
- FY25 segment mix, capital allocation framework, dividend policy, capex history
- TSMC 2025 SEC 20-F
- FY25 annual report regulatory filing for ADR
- cash flow detail
- SBC disclosure
- TSMC 4Q25 Earnings Call Transcript
- Capacity utilization, Arizona ramp commentary, capex guidance
- TSMC 4Q25 Management Report
- FY25 full-year P&L, capex (~NT$1.27T / ~$40B), balance sheet
- TSMC Arizona corporate site
- Arizona Fab 1 N4 HVM, yield parity statements
- TSMC Form 20-F (most recent annual filing)
- Customer concentration disclosure (one unnamed >10% customer), geographic/end-market revenue mix
- TSMC Form 20-F (most recent, FY2024)
- Risk factors, government grants disclosure, material litigation note
- TSMC FY24 Annual Report and 20-F filings (general reference)
- FX sensitivity rule-of-thumb (~40 bps GM per 1% TWD/USD move), revenue mix by geography, capex profile, segment mix HPC/smartphone/auto/IoT, balance sheet net cash position
- TSMC IR — Q1 2026 Quarterly Results page
- Q1 2026 revenue, gross/operating/net margins, capex, Q2 and full-year 2026 guidance
- TSMC Q1 2026 Earnings Call Transcript (Investing.com)
- Q1 2026 OCF (NT$699B), FCF (NT$348B), ROE (40.5%), raised long-term GM target (56%+), 2026 capex high-end of $52-56B range
- TSMC quarterly earnings calls (Q3 2024 through Q1 2026)
- HPC overtaking smartphone commentary, CoWoS capacity-doubling guidance, end-market segment color, demand-quality signaling
- TSMC quarterly earnings transcripts FY24-Q1 FY26 (general reference)
- Wafer pricing direction (2023 6-8% raise, 2024 ~3%, N2/A16 reported ~10-15% premium), China revenue trajectory, Arizona ramp commentary, water/power risk mentions
- User-provided cohort context for customer dimension
- Apple ~25%, HPC overtook smartphone in 2024–25, hyperscaler custom-silicon list, switching-cost description, cycle-position read by end-market
- USITC — Ukraine, Neon, and Semiconductors (executive briefing)
- Pre-2022 neon supply baseline
- Wccftech - TSMC Tight 2nm Supply, Four Consecutive Years of Price Hikes
- Confirms multi-year price-hike runway
- supply tightness at N2
- Wccftech — TSMC 2nm Tight Supply / Four-Consecutive-Year Price Increases
- Pass-through pricing power evidence
- Works in Progress Magazine — The world's most complex machine (ASML/EUV)
- ZEISS / Cymer / TRUMPF technical context